Rich Brunner at AMD is giving a quick talk on AMD 64 bit architecture. They’re going to demo the new SuSe running on AMD 64.
Of course, AMD’s x86-64 works in compatability mode for full 32 bit and also long mode, either in mixed 32/64 bit or pure 64 bit flavours. They just extended the 32 bit space by adding another 32 bits to integer registers, as well as adding on to the SSE registers and GPR registers.
They’re going to demo a dual proc 64 bit system with 8 gigs of memory. The default data size is still 32 bits while allowing you to address 64 bits of memory. Code bloat for x86-64 is about 20% more than x86. Not bad. Default data size helps that. The added just two new instructions.
The adoption curve will look like this:
- First OSes get ported over and are adopted. Now SuSe works, WinXP soon, etc.
- Apps will be 32 bit for awhile, but will eventually be ported to 64 bit and will be purchased/upgraded when they require replacing.
- Many apps will remain 32 bit for quite some time, so 32 bit performance is important.
Hammer == K8 == core that’s in an AMD Opteron, AMD Athlon64 and AMD Athlon 64 FX. Got it?
AMD64 == x86-64. Athlon’s marketing department likes AMD64 better. I like x86-64 myself.
Hypertransport is important for speed increases. Memory controller is run at processor clock frequencies. The latency to memory is reduced significantly.
HyperTransport rules. It removes bottlenecks between processor and memory. This is good. Right now it’s clocked at 800MHz, but that will ramp up and increase throughput with it. Hypertransport is point to point. Legacy south bridge, PCI-X 1.0, and eventually a PCI-X 2.0 tunnel. Supports a 2GB/s (8x) AGP interface. PCI-Express.
Hypertransport scales quite well to mutliprocessor systems. With HT, as you add processors, you add memory to hang off them. Each processor has access to their own memory. As far as they’re concerned, memory is globally addressable. Each processor gets three HT links, so it can link to two other processors and an IO bridge, or whatever is neccesary.