CNet reports that AMD is trying to reduce costs of manufacturing in some interesting ways:
In the Athlon64 line, for instance, the 3700+, 3400+ and 3100+ chips will initially come with 1MB of cache. In the fourth quarter, however, the underlying structure of the 3100+ will change: Its clock speed will substantially increase, but its cache will be reduced to 256KB, or one-quarter the original size.
Also:
AMD’s plans for the Thorton chip, an upcoming member of the Athlon XP family, suggest it will be the same size as the Barton chip, but half of the cache on the processor will be disabled. (It will also be paired with a slower bus
I understand that given the current economic outlook, you’ve got to cut costs by any means neccesary, but I’m not too thrilled by how they appear to be doing so. I know back in the early Thunderbird days it was easier to make a faster chip in a smaller process and then clock it down. That’s fine, but reducing the cache so significantly without making note of it to the end consumer is not, IMHO.
I’d rather have a slightly slower chip with a 1MB cache than a higher speed chip with less cache. It’s why Celerons (especially older ones) can lag out sometimes. Granted, the newer Celerons and Durons are much better than in the past, but if you’re going to cripple a chip, put a sticker on it or something.
Minirant aside, I’m still totally stoked about the Opteron and the Athlon64, and I’d like to have one on my desk as soon as it’s reasonably affordable. For the record I run a mix of AMD and Intel chips among my computers, some by choice (My oldschool Athlon 750) and others by virtue of extremely good deals that I couldn’t pass up (Dual PIII733’s and a PIII850). The Celerons, PII’s and K6-II’s that I still run are mostly Linux/BSD machines, and they don’t complain one bit.